Packet switching system

ABSTRACT

A packet switching system that arbitrates between Virtual Output Queues (VoQ) in plural input buffers, so as to grant the right of transmitting data to a crossbar switch to some of the VoQs by taking both an output data interval of VoQ and queue length of VoQ as parameters, wherein the system suppresses the delay time of the segment of VoQ having high load thereby preventing buffers from overflowing; and also permits the VoQ having low loads to transmit segments under no influence of the VoQ that has high load and is just reading out the segment.

BACKGROUND OF THE INVENTION

[0001] The present invention relates to a packet switching system havingan input buffer and an output buffer (referred to as input/output bufferpacket switching system, hereinafter), particularly to the packetswitching system adopting an arbiter system.

[0002] Conventional input/output buffer packet switching system, whichhas a First-In First-Out (FIFO) memory for each input line, has adisadvantage where if plural packets inputted from plural input linesconverge at a predetermined output path, “Head Of Line (HOL) blocking”is caused, suffering from only 58.6% throughput of data transfer. Toavoid the HOL blocking, there provides a well known method that hasVirtual output Queue (VoQ) for each output path at an input buffer.

[0003] The input/output buffer packet switching system, because of acrossbar switch which has no buffer, adopts the way to arbitrate betweenthe VoQs of input buffers, so as to prevent data on the crossbar switchfrom being converged. The arbitration is performed for deciding acombination of an input port and an output port to give the grant oftransmitting data to some of the VoQs. Accordingly higher throughput ofdata transfer of the switching system depends on efficient arbitration.

[0004] There are two ways of arbitration for deciding a combination ofan input port and an output port: one where arbitration is performedusing the unit of a fixed-length internal packet into which variablelength packet inputted to the switch has been divided; another where, asindicated in U.S. Ser. No. 09/362,134, arbitration is performed usingthe unit of a fixed-length container into which plural variable lengthpackets packed. In this way, two units are used on a switchingprocessing; one unit of an internal packet having a small fixed lengthand another unit of a container having a large fixed length.

[0005] As regards a unit used on the processing in the switching systemof the invention, the volume of data per arbitration is defined as onesegment. Note that hereafter the term “segment” is also defined asgeneric term of data to be treated inside the switch, data such as aninternal packet, a packet, and a cell.

[0006] As conventional arbitration, the following three methods areproposed:

[0007] First is a method of selecting a sending queue on Round Robin bytaking whether segment of VoQ exists as a parameter, disclosed in “AStudy of structuring a Large Capacity Packet Switching Systems,” KojiWAKAYAMA, et al., SHINGAKUGIHOU SSE98-160, and also disclosed inJP-A-2000-78148;

[0008] Second is a method of selecting sending queues by taking awaiting time of the segment in VoQ as a parameter, disclosed in “A Studyof Scheduling an Input Buffer Switch and Trial manufacture thereof,”Toshiyuki SUDO, et al., SHINGAKUGIHOU SSE99-118;

[0009] Third is a method of selecting output data queue by taking thelength of VoQ as a parameter, disclosed in “A Proposal of BalancedPacket Scheduling Algorithm and Performance Evaluation,” SHINGAKUGIHOUSSE96-56.

[0010] Each of the three methods has a problem caused when unbalancedload is given to the switch. Referring to FIG. 16 which is a conceptualview of an input port 30 of a 4×4 switch, we will explain the problemsbelow. In the figure, reference numbers 31-1, -2, -3, and -4 are VoQs,each being directed for its output path; a quadrangle in each VoQrepresents a segment; the 31-1 shows traffic which has a higher loadthan other queue; and the 31-4 shows traffic which has a lower load thanother queue.

[0011] In the first method of selecting a sending queue on Round Robinby taking whether segment of VoQ exists as a parameter, if unbalancedloads are given to the switch, the Round Robin that equitably reads outsegments from all VoQs permits the VoQ having low loads to transmitsegments under no influence of the VoQ that has high load and is justreading out the segment. However, queues of a VoQ having high load isliable to be long, causing its delay time in segment transmission insidethe switch to be longer than those of other VoQs. As shown in thefigure, this brings about overflow of segments at VoQ 31-1 having highload, and might abandon a segment 32A.

[0012] In the second method of selecting sending queues by taking awaiting time of VoQ of the segment as a parameter, in the same way asthe first method, queues of a VoQ having high load is liable to be long.This causes a waiting time of the segment in the VoQ to be long. Themethod that takes a waiting time of the segment in VoQ as a parametertransmits a segment having a long waiting time in a priority manner.Under the condition, management of the waiting time of all segmentsneeds a lot of counters, so the method is not practicable.

[0013] Therefore, in most case, the second method counts the waitingtime from when the segment has arrived at the top of the queue.Specifically, it adds 1 to the counter of the VoQ when the segment inthe VoQ is not transmitted during one arbitration while resets thecounter when the segment is transmitted during one arbitration. Thistreats both VoQ having high load and VoQ having low load in the samecondition, because the counter resets once the segments of the VoQ whicheven has high load is transmitted. Thus, the delay time of the VoQ towhich high load is given under the unbalanced load finally becomeslarge, and thus this might abandon the overflow segments of the buffer.

[0014] In the third method of selecting sending queues by taking thelength of the queue as a parameter, the segment can be effectively readout from VoQ having high load under above-said condition whereunbalanced load is given to the switch. Thus, the delay time of thesegment of VoQ having high load comes to be small, also preventing abuffer from overflowing. The method, however, suffers from a phenomenoncalled starvation in which grant is not given to a segment 32B of VoQ31-4 that has low load.

[0015] Accordingly, the method might deteriorate qualities in packets,especially in both packets of voice data, which is required never to belate in data transfer, and packets of important data, which is requirednever to be abandoned in data transfer, both for keeping good quality indata.

SUMMARY OF THE INVENTION

[0016] The invention aims to provide a packet switching system thatarbitrates between the VoQs to decide a combination of an input port andan output port, and thereby granting transmitting data to some of theVoQs by taking both an interval in sending a segment from VoQ and queuelength of VoQ as parameters.

[0017] According to one aspect of the invention we provide the packetswitching system having: a queue length manager for managing the volumeof segments queued in each VoQ per input line; an output data intervalmanager for managing an output data interval of the segment of each VoQ;and an arbiter-request (ARB-REQ) generator for allocating level oftransmission to the VoQs according to information received from thequeue length manager and the output data interval manager, whereinarbitration is performed on the level assigned each VoQ so as todetermine which VoQs will be sent.

[0018] According to another aspect of the invention we provide thepacket switching system having: means for putting segment transferinterval prior to queue length in arbitration so as to determine VoQlevel; and means for putting queue length prior to segment transferinterval in arbitration so as to determine VoQ level;

BRIEF DESCRIPTION OF THE DRAWINGS

[0019]FIG. 1 is a block diagram for explaining one embodiment of apacket switching system of the present invention.

[0020]FIG. 2 is a block diagram of the structure of an ARB-REQ generator13 and a VoQ controller 12 of FIG. 1.

[0021]FIG. 3 is one example of a level assignment matrix for assigning alevel to VoQ by the ARB-REQ generator of FIG. 13.

[0022]FIG. 4 is one example (prioritizing output data interval) of thelevel assignment matrix for assigning the level to VoQ by the ARB-REQgenerator of FIG. 1.

[0023]FIG. 5 is one example (prioritizing queue length) of the levelassigning matrix for assigning the level to VoQ by ARB-REQ generator ofFIG. 1.

[0024]FIG. 6 is a block diagram of an example of the structure of anarbiter 14 of FIG. 1.

[0025]FIG. 7 is a view for explaining a concept of a VoQ level matrix ofthe present invention.

[0026]FIG. 8 is a view for explaining a concept of a tournament of thepresent invention.

[0027]FIG. 9 is a table of a combination of win and defeat of thetournament for every input and every output of the present invention.

[0028]FIG. 10 is a view for explaining a concept of a level reassignmenttable of the present invention.

[0029]FIG. 11 is a flowchart for explaining an algorithm which thearbiter 14 of FIG. 1 performs.

[0030]FIG. 12 illustrates processing of the arbiter 14 of FIG. 1.

[0031]FIG. 13 is a block diagram of a total structure of anotherembodiment of a packet switching system of the present invention.

[0032]FIG. 14 is a graph of indicating 99% delay of the conventionalarbiter and an arbiter of the present invention.

[0033]FIG. 15 is a graph of indicating queue length distribution of theconventional arbiter and the arbiter of the present invention when anunbalanced load is given.

[0034]FIG. 16 is a view for explaining a concept of an overflow of VoQto which high load traffic is given and starvation of VoQ to which lowload traffic is given.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0035]FIG. 1 illustrates one embodiment of a packet switching system ofthe present invention. In the system, ARB-REQ information is transmittedto an arbiter through a separate line 18 which is different from a dataline for connecting VoQ 11 and Crossbar Switch 19.

[0036] An input line processor 16-i (i=1 to n) extracts addressinformation of a packet by analyzing a packet header of a packet whichis input from an input line 103-i. An input buffer 10-i includes nVoQ11-i to an output port correspondence. An input processor 16-i givesaddress information which has been extracted to a VoQ controller 12. TheVoQ controller 12-i gives an indication to an input buffer 10-i so as towrite the packet in VoQ corresponding to the output corresponding toaddress information. In this way, the packet is written in VoQ 11-iwhich has been designated.

[0037] The VoQ controller 12-i manages, per VoQ 11-i, informationbetween the volume of queuing segments and a waiting time (that is tosay, an output data interval of each segment) of the segment at the topof a queue buffer. An ARB-REQ generator 13-i assigns each level to eachVoQ according to those of information.

[0038] Each VoQ level is collected to an arbiter 14 by a signal line 18during one arbitration period. It is decided by the arbiter 14 to givegrant to which of VoQ according to its information.

[0039] Grant information is transmitted to each of VoQ controllers 12-i(i=1, . . . , n) as ARB-ACK by a signal line 15, and, at the same time,the arbiter reflects the results of its arbitration to the structure ofa path inside a crossbar switch. The VoQ controller 12-i informs it tothe input buffer 10 that which of VoQ should send a segment according toits ARB-ACK information.

[0040] The segment transmitted from the input buffer 10-i is switched bya crossbar switch 19 and then transmitted to an output line processor17-i. The output line processor 17-i restructures the packet from thesegment which has been received from the crossbar switch 19 and thensends it to an output line 104-i.

[0041] With reference to FIG. 2, the structures of the VoQ controller 12and the ARB-REQ generator 13 are described in detail. At this point,FIG. 2 employs one example of the case of a 4×4 switch size for simpleexplanation.

[0042] The header of the packet which has been processed in the headeranalyzer 401 inside the input processor 16 is transmitted to a writeaddress (WA) generator 403 in the VoQ controller 12, managed to write aninput packet to which VoQ11 by the WA generator 403. The WA generator403 sends memory address information to the input buffer 10 by way of aWA control signal line 412, and gives an indication of writing thepacket to VoQ 11 corresponding to a destination. At the same time, theWA generator 403 transmits information of the packet which has beenwritten in the input buffer 10 to a queue length manager 405 and anoutput data interval manager 406. The queue length manager 405 has aqueue length counter 410 corresponding to each of all VoQs inside theinput buffer 10.

[0043]FIG. 2 gives the case of a 4×4 switch as an example. Since fourVoQs exist in the input buffer 10, the queue length manager has fourqueue length counters 410. The queue length manager 405 increases thelength of the segment of the input packet to the numeric value of thequeue length counter 410 for the current length of the queue. The outputdata interval manager 406 has an output data interval counter 411corresponding to one or more VoQs inside the input buffer 10. The outputdata interval manager 406 does nothing to the VoQ in which the packethas been input in the case where the segment has already existed. If thesegment has not existed, the output data interval manager 406 gives anindication to the output data interval counter 411 corresponding to theVoQ so as to add 1 to the numeric value per arbitration period, andmanages the output data interval time. In other words, the numericalvalue which the output data interval counter 411 shows indicate that howlong the segment has not been transmitted from corresponding VoQs.

[0044] A read address (RA) generator 404, according to ARB-ACKinformation transmitted from the signal line 15, transmits, through asignal line 413, information to send from which VoQ the segment to theinput buffer. At the same time, the read address (PA) generator 404transmits information of the segment which is read out from the inputbuffer 10 to the queue length manager 405 and the output data intervalmanager 406 as well. The queue length manager 405 decreases the queuelength counter 410 corresponding to VoQ which has transmitted out thesegment to the crossbar switch 19. Further, the output data intervalmanager 406 resets the value of the output data interval counter 411corresponding to the VoQ.

[0045] Information of the queue length manager 405 and of the outputdata interval manager 406 is transmitted to the ARB-REQ generator 13 byway of a signal line 414. The ARB-REQ generator 13 has an ARB-REQgenerating part 409 corresponding to each queue inside the input buffer10. Respective ARB-REQ generating parts 409-1 to -4 assign some level tothe corresponding queue according to information received from theARB-REQ generator 13. When the level is assigned to the queue, a VoQlevel assignment matrix 416 is referred. For the VoQ level assignmentmatrix 416, it is possible for a user to tune the arbiter in accordancewith the characteristics of the traffics which are input to the nodethereof. The level of each VoQ which has been created in the ARB-REOgenerator is transmitted to th e arbiter 14 by way of the signal line18.

[0046]FIG. 3 shows one embodiment of the VoQ level assignment matrix416. The level assignment matrix has a segment transfer interval 71 in ahorizontal axis and the number of segments queued in VoQ in a verticalaxis 72. The longer an output data interval time is and the more thenumber of segments queued in VoQ is, the bigger the level assigned toVoQ is. The level assignment matrix is calculated from a queue length(the number of segment in VoQ) and the segment transfer interval.

[0047] By assigning the level to the queue in this way, it comes to bepossible to send within a delay time for setting arbitrarily the packetwhich has entered into the switch.

[0048] The time for sending the packet from the queue of VoQ having ahigh load is longer than that of VoQ having a low load. Thus, a highlevel is assigned to VoQ in which the number of segments stored in thequeue is big, and thus grant is given thereto in a priority manner. Inother words, this level indicates information of the degree of priorityin obtaining grant.

[0049] Since the packet is transmitted within a delay time which is setarbitrarily by way of VoQ having low load, it functions to increase theVoQ level if the transmitting interval becomes long.

[0050] The VoQ level L is obtained from the following expression.$L = {\frac{1}{\ln \left( {\frac{M - {a \cdot t}}{b \cdot s} \times } \right)} \times 15}$

[0051] where, M: time out, t: output segment interval, s: the number ofsegments at the present time, a: output data coefficient, b: queuelength coefficient.

[0052] When (M−a·t)/b·s≦1 is attained, the VoQ level attains the maximumvalue. When the VoQ level has reached the maximum value, it is indicatedthat the VoQ thereof has reached to such a condition as having a highpossibility of obtaining a grant.

[0053] M is a value which is defined from both a delay time that canarbitrarily be set by the switch and one arbitration time. M is also avalue for deciding both the maximum value of segment transfer interval71 in level assignment matrix and the maximum value of the number ofsegments 72 queued in VoQ. Where T is the delay time which is requiredby the switch and determined arbitrarily, ta is a time for onearbitration time, n is the number of input ports of the switch. M can beobtained by the following expression. $M = {\frac{T}{t_{a}} - n}$

[0054] T/ta can define the number of times of performing arbitrationduring the delay time T which can be defined arbitrarily. on theassumption that the levels of all VoQs attain the maximum values at thesame time, until the grant is given, VoQ, to which the time for maximumn arbitration will be waited, appears. Therefore, in order to transmitthe segment within the delay time which is arbitrarily defined, even ifVoQ has only one segment, a VOQ level takes maximum, when the outputdata interval becomes T/ta−n.

[0055] As shown from the level assignment matrix shown in FIG. 3, sincethe VoQ level becomes high as the output data interval turns to be largein VoQ having only one segment, it is not necessarily concluded that thesegments are not transmitted until the maximum delay time is requested.

[0056] The level assignment matrix in FIG. 3 is limited to time outM=20, a=1, and b=1. By changing an output data interval coefficient anda queue length coefficient b, it is possible for them to be changed toarbitration which regards the output data interval as important andarbitration which regards a queue length as important.

[0057] When the packet switching system of the present invention isemployed in a place where, for example, a lot of voice data requirednever to be late in data transfer, should be processed, setting ischanged so as to suppress the delay time as much as possible where suchdata are queued in VoQ having low load traffics.

[0058] Concretely, setting the value of the output data intervalcoefficient a to 1 or more permits the VoQ in which the segments are notyet filled to get a large level within a short output data interval.FIG. 4 shows the condition of the VoQ level assignment matrix at thetime of defining the value of the output data interval coefficient a as2. When the level of the matrix in FIG. 4 is compared with the levelassignment matrix of FIG. 3, the VoQ level already becomes large whenthe output data interval of the segment is small. Thus, it is alsopossible for VoQ having the low load to transmit the segment in a shortdelay time.

[0059] On the contrary, when the packet switching system of the presentinvention is employed in a place where a lot of data required never tobe abandoned in data transfer, should be processed, though the delaytime of VoQ having the low load traffic lengthens slightly, it ispreferable to suppress an overflow of a buffer by outputting thesegments from VoQ having the high load traffics in a priority manner. Insuch a case, by defining the value of the queue length coefficient b asthe value greater than 1, it is permitted to assign the VoQ level whichacts in response sensitively to a change of the length of the queue.When the high load is applied, the length of the queue turns to be long.FIG. 5 exemplifies the condition of the level assignment matrix at thetime of assigning the queue length coefficient as 2. When the levelassignment matrix is compared with the level assignment matrix of FIG.3, large levels are found in places in which the number of the segmentsof VoQ is small. Therefore, for VoQ in which the length of the queuebecomes longer, it is possible to prevent VoQ in which the length of thequeue becomes longer from the buffer's overflowing by making it easy togive grant by giving a larger level as soon as earlier.

[0060] Further, where the output data interval is not considered at alland it is desired that arbitration is performed using only the length ofthe queue, it comes to be possible by defining the value of the outputdata interval coefficient a as 0.

[0061] All of the VoQ levels calculated by a numeric expression 1 arerounded off and they are expressed in the level assignment matrix asintegers. Further, when M−a·t<b·s or M≦a·t is attained, they become thevalues other than 0<L≦15. However, when such a situation occurs, sinceit is expressed that the VoQ level already exceeds the maximum level 15,the level 15 is given to VoQ to which the values other than 0<L≦15 aregiven by this expression.

[0062] Information of the level per VoQ is collected to arbiter 14 fromeach ARB-REQ generator.

[0063]FIG. 6 is a block diagram of an embodiment of the arbiter 14. Inall VoQ levels collector 121, information of the level of all VoQs iscollected.

[0064]FIG. 7 expresses the condition of all VoQs to which requests havebeen made as of arbitrary points of time. The column of the matrixexpresses an output line number 131, and the row thereof expresses aninput line number 132. For example, in the case where an input linenumber is 1 and an output line number is 1, the level, which is assignedto VoQ 11-1-1 of an input buffer 10-1 of FIG. 1, is stored. Further, a“0” 133 of the matrix has the same VOQ level and the level smaller than“0” is assigned to an empty portion.

[0065] In this condition, giving grant to VoQ having an output linenumber 4 in an input line number 2 and VoQ having an output line number2 in an input line number 4 obtain the best combination of inputs andoutputs. In order to give grant to VoQ efficiently all the time, atournament for each of inputs and a tournament for each of outputs areperformed.

[0066]FIG. 8 is a view of a concept of tournament processing. In FIG. 8,numerals represent the level of VOQ which is a member of the same inputline number or output line number. In FIG. 8, though there are two VoQshaving the same levels, in such a case, it is made not to win either onebut to win all VoQs having the same levels. This is to give grantefficiently as shown in FIG. 7.

[0067] This tournament processing is performed for each of input linedirections and for each of output line directions in an every input linetournament processor 122-1 and an every output line tournament processor122-2, and then VoQ is selected, which has the highest VoQ level (therequest of transmitting is the highest among their line numbers) amongthem.

[0068] As the result of the tournament, a win/defeat combination 141 ofFIG. 9 is capable of being considered for an input line direction and anoutput line direction. The level reassignment part 124 evaluatesinformation of each VoQ level by reducing to 4 levels, 0 to 3, accordingto a level reassignment table 61 of FIG. 10.

[0069] VoQs which have been reevaluated into 4 levels, 0 to 3, arepicked up sequentially from VoQs of the level 3 in a selector 125 of VoQhaving the same level. Grant is given to VoQ which has been picked upherein by a Round Robin selection in a grant assignment part 126.

[0070] Since it is not possible to give grant in the same arbitrationperiod from both VoQ to which grant is given and VoQ which is a memberof the same input line number or the same output line number, grant istaken away in a grant deprival part 127.

[0071] Information of VoQ, grant of which has been deprived, is notifiedto all VoQ levels collector 121 by way of a signal line 123. From itsinformation, the tournament is performed once more among VoQs, grant ofwhich has not been deprived at all, and then the levels thereof arereevaluated. Then, in the same way as the aforementioned description,VoQ having level 3 is picked up by way of a same level VoQ selector 125,and then grant is given to the VoQ by a grant assignment part throughthe Round Robin selection. By repeating such a repetitive operation, itis possible to create the best combination of input line and outputline.

[0072] Since it is not possible to give grant at the same time in thesame arbitration period from VoQs that are members of the same inputline number or the same output line number as VoQs having grant in theaforementioned process, the grant deprival part 127 deprives grant fromthe VoQs. Information of VoQ, grant of which has been deprived, isnotified to the same level VoQ selector 125 by way of a signal line 129.The same level VoQ selector 125 picks up VoQ having level 2 still havinggrant and then gives grant by the grant assignment part through theRound Robin selection.

[0073] Then, by way of the same process as giving grant to VoQ havinglevel 2, grant is given to VoQ having level 1. Grant is also given toVoQ with the level 0 having grant to be transmitted next.

[0074] Grant information is changed to ARB-ACK information by an ARB-ACKgenerator 128, and then transmitted to the RA generator 404 of the VoQcontroller 12 by way of the signal line 15. The RA generator 404transmits the segment-transmitting signal 413 to VoQ, according toARB-ACK information. At the same time, VoQ information for sending thesegment is notified to the queue length manager 405 and the output datainterval manager 406. The queue length manager 405 decreases the numberof transmitted segments from the value of the queue length counter 410which manages the number of segments of VoQ to which grant has beengiven. In the output data interval manager 406, the value of the sendingout interval counter 411, which manages the output data interval of VoQto which grant has been given, is reset.

[0075]FIG. 11 is a flowchart of a sequential process of theaforementioned arbiter 14. The tournament is performed to the VoQ levelswhich have been collected from each of the input buffers with respect tothe input and the output (S81) The VoQ levels thereof are reevaluatedusing the levels of 3 to 0 in order of highly requested output data foreach VoQ (S82-1 to -4). First of all, VoQs of the level 3 are picked upby way of the same level VoQ selector 125 (S83). Grant is given to themthrough the Round Robin (S83-1) (it may be considered to adopt 2DRR(Mamoru TAKAHASHI, et al., “Improvement ofPacket-Priority-considered-Packet-Switch having Input Queuecorresponding to each Output Port,” SHINGAKUGIHOU SSE97-13) and thelike, which has a pointer in order to maintain the state of being equalas this Round Robin). Since it is not possible to transmit the segmentat the same time as the same arbitration period from VoQ for the sameinput and the same output as VoQ to which VoQ has given, grant of VoQ isdeprived (S83-2).

[0076] In the present embodiment, in order to improve efficiency of thearbiter, not to give grant to VoQ having level 2, but the level of VoQ,to which grant is not given, is back to the level of 0 to 15 beforereevaluating, the tournament is performed once more, and thenreevaluation of the level (S84) is performed. The more this process isrepeated, the more the combination of the queues selected by arbitrationis closed to the most suitable one.

[0077] As a result of reevaluating, grant is given to VoQ having level 3(S83-1). Grant of VoQ, which has the same combination of input lines andoutput lines as the VoQ obtaining grant, is cancelled (S83-2).

[0078] Subsequently, VoQ having level 2 is picked up (S85), grant isgiven (S85-1), and then grant of VoQ which has the same combination ofinput lines and output lines as VoQ to which grant has given is canceled(S85-2).

[0079] Subsequently, VoQ having level 1 is picked up (S86), grant isgiven (S86-1), and then grant of VoQ which has the same combination ofinput lines and output lines as VoQ to which grant has given is canceled(S86-2).

[0080] At last, if there is VoQ having grant at the level 0, grant isgiven by way of the Round Robin selection (S87). In this way, it isended to give grant to the combination of all of the inputs and theoutputs, and then the process of arbitration has been finished.

[0081]FIG. 12 is the results of processing in accordance with theflowchart of FIG. 11. This figure indicates arbitration of the 4×4switch. It is possible to express the VoQ levels, which have beencollected in all VoQ levels collector 121, visually in a matrix 21 way.The row of the matrix indicates the input line number, and the columnindicates the output line number. This matrix shows that, for example,in the matrix 21, the VoQ level for the input line number 3 and theoutput line number 1 is 10.

[0082] The tournament of FIG. 8 is performed for each of the input linesand the output lines, and thereafter aforementioned reevaluation isperformed in FIG. 10. A matrix 22 indicates the results thereof.

[0083] The matrix 23 shows that VoQ having level 3 has been selectedfrom the matrix 22 and grant has been given thereto by way of the RoundRobin selection. Since grant cannot been given to VoQ which has the sameinput line number or output line number as VoQ to which grant has beengiven at the same arbitration period, grant is deprived therefrom. Thesymbol “x” of the matrix 24 indicates that grant has been deprived.

[0084] Next, The level of VoQ to which grant has not yet been given isback to the level of VoQ which has been created in the ARB-REQgenerator. A matrix 25 indicates the matrix which has already beenconverted. Once more, the tournament and reevaluation of the levels areperformed.

[0085] A matrix 26 indicates the result thereof. In the matrix 26, grantis given to VoQ having level 3. At this point, grant is given to VoQhaving the input line number 2 and the output input number 4.

[0086] A matrix 27 indicates that grant has been given thereto. Grant isdeprived from VoQ which has the same input line number and the outputline number as VoQ to which grant has been given.

[0087] A matrix 28 indicates that grant has been deprived therefrom.Next, grant is given to VoQ having level 2.

[0088] A matrix 29 indicates that grant has been given thereto.

[0089] In the case of being explained in FIG. 6, since grant has beengiven to all of the combinations of inputs and outputs in accordancewith the aforementioned processes, a series of arbitration hasterminated. For the case other than that, there maybe a case where aprocess of giving grant to VoQ having level 1 and the level 0 isrequired. In such a case, grant is given in accordance with theflowchart of FIG. 1.

[0090]FIG. 13 is another embodiment of the packet switching system ofthe present invention. In the embodiment, by giving ARB-REQ informationto a header portion of the segment without using another line, it istransmitted to an arbiter via in-channel.

[0091] The points different from the packet switching system of FIG. 1are that ARB-REQ information is once transmitted to an ARB-REQassignment part 111 by way of a signal line 118 and then to the arbiter14 by giving ARB-REQ information 114 to the header portion of a segment113 and that the arbiter 14 is included inside the crossbar switch 19.

[0092] In the same way as the embodiment of FIG. 1, ARB-REQ informationis collected in the arbiter 14, and then it is decided to give to whichVoQ from ARB-REQ information. Then, grant information is assigned to aheader 116 of a switched segment 115 as ARB-ACK from the arbiter by wayof the signal line 129. Grant information is collected in an ARB-ACKcollection part 112, and then transmitted to the VoQ controller 12 bywayof a signal line 119. The VoQ controller 12 instructs an input buffer totransmit the segment from which VoQ.

[0093] The advantageous point of this method is that it is possible tomake simple the structure of a hardware since the number of the signallines can be decreased because it is not required to prepare the signalline for the arbiter.

[0094]FIGS. 14 and 15 show results of the simulation of a queueinformation management arbiter of the present invention and anarbitration method (referring to Koji WAKAYAMA, et al., “A Study ofstructuring a Large Capacity Packet Switching Systems,” SHINGAKUGIHOUIN98-160) for performing the Round Robin by judging the presence of thesegment of VoQ under the same condition. It is supposed that thecondition of the simulation is a 4×4 input output crossbar switch havingthe input line number 4 and the output line number 4.

[0095]FIG. 14 shows a distribution graph of an average delay time of theconventional arbiter and the proposed arbiter of the present applicationat the time of having uniform traffic. The vertical axis 92 is Delay(Segment), and the horizontal axis 91 has Load Rate (%). The higher theload of a line is, the bigger the volume of the delay of theconventional arbiter is. However, it is possible for the proposedarbiter to suppress the delay time from increasing.

[0096] Even for uniform traffic, if the load of the line becomes higher,the traffic condition tends to be unbalanced. Therefore the proposedarbiter which takes both output data interval and queue length of VoQ asparameters can suppress the delay time better than the conventionalarbiter which takes whether the segment exists as a parameter.

[0097]FIG. 15 shows the results of the simulation of the delaydistribution of VoQ having low load traffic and VoQ having high loadtraffic when traffic having the load higher than others is given to oneinput line among 4 input lines. The vertical axis 102 is Probability(Delay time>d), and the horizontal axis 101 is Delay (segment).

[0098] Quadrilateral plots express the delay distribution of the inputport having traffic of the higher load, and triangle plots express thedelay distribution of the input port having traffic of the lower load.

[0099] As shown from the delay distribution of VoQ having traffic of thehigher load, the proposed arbiter suppresses the delay time better thanthe conventional type arbiter. The length of the queue of VoQ havingtraffic of the higher traffic is longer than that of other VoQs. Theproposed type of performing arbitration taking the length of the queueas a parameter tends to give much grant to VoQ having long queue length.This can suppress the delay time of VoQ having traffic of the higherload.

[0100] On the other hand, though an impact is given to VoQ havingtraffic of the low load by said effect, the switching system of thepresent invention can suppress the effect to VoQ having low load trafficbecause it takes output data interval as a parameter.

[0101] Since the length of the queue is managed, it is possible toperform highly effective switching even when unbalanced loads are givento the switch. It is possible to suppress the delay time of VoQeffectively, to which traffic of the high load is given. Further, it ispossible to transmit the segment without giving the effect to VoQ towhich traffic of the low load is given.

[0102] Even for VoQ to which traffic of the low load is given, it ispossible for VoQ level to take the maximum level when the timepredetermined by a user arrives. Thus, it comes to be easy to remainundefeated in the input direction and the output direction for thetournament of next processing and thus it comes to possible to attainthe maximum level when the level is reevaluated. Therefore, it comes tobe easy for its VoQ to obtain grant of the segment. Therefore, it comesto be possible to prevent starvation of VoQ to which traffic of the lowload is given.

[0103] By employing the present invention, it is possible to provide thearbiter capable of managing any of the balanced loads or the unbalancedloads.

We claim:
 1. A packet switching system, comprising: a plurality of inputline processors; a plurality of input buffers being connected to saidinput line processors; each of said input buffers includes a pluralityof queue buffers corresponding to said output line processors; aplurality of output line processors; and a crossbar switch beingconnected to said input buffers and said output line processors; theimprovement characterized in that: arbitration is performed by takingboth an interval of time for a packet to be transmitted to the crossbarswitch from said queue buffer and a queue length of said queue buffer asparameters, both are calculated for each queue buffer of said queuebuffers, to thereby select a queue buffer among all queue buffers in theinput buffers and give the selected queue the grant for transmitting apacket to said crossbar switch.
 2. A packet switching system as setforth in claim 1, further comprising: output data interval measuringmeans for measuring an interval of time for a packet to be transmittedto the crossbar switch from said queue buffer, and queue lengthmeasuring means for measuring a length of the queue buffer, bothmeasuring each queue buffer of all the queue buffers.
 3. A packetprocessing unit as set forth in claim 1, wherein the arbitration isperformed by taking as a parameter the queue length prior to the timeinterval so as to prevent packets from overflowing from each of thequeue buffers.
 4. A packet processing unit as set forth in claim 1,wherein the arbitration is performed by taking as a parameter the timeinterval prior to the queue length, so as to shorten a time for a packetto exist in each of the queue buffers.
 5. A packet switching system,comprising: a plurality of input line processors; a plurality of outputline processors; a plurality of input buffers including a plurality ofqueue buffers, being provided corresponding to the output lineprocessors, and being connected to the input line processors; a crossbarswitch being connected to the input buffers and the output lineprocessors; an arbiter to arbitrate for assigning grant of transmittinga packet to said crossbar switch, to any of queue buffers of the queuebuffers; and means to determine priority as a parameter between aninterval of time for a packet to be transmitted to the crossbar switchfrom said queue buffer and a queue length of said queue buffer, both arecalculated for each queue buffer of said queue buffers, to therebyselect a queue buffer among all queue buffers in the input buffers andgive the selected queue the grant for transmitting a packet to saidcrossbar switch; wherein said arbiter performs arbitration according tosaid priority determined on all queue buffers of the input buffers.
 6. Apacket switching system as set forth in claim 5, further comprising:output data interval measuring means for measuring an interval of timefor a packet to be transmitted to the crossbar switch from said queuebuffer, and queue length measuring means for measuring a length of thequeue buffer, both measuring each queue buffer of all the queue buffers.7. A packet processing unit as set forth in claim 5, wherein thearbitration is performed by taking as a parameter the queue length priorto the time interval so as to prevent packets from overflowing from eachof the queue buffers.
 8. A packet processing unit as set forth in claim5, wherein the arbitration is performed by taking as a parameter thetime interval prior to the queue length, so as to shorten a time for apacket to exist in each of the queue buffers.